'Parker' robo-ride processor design revealed
Hot Chips
Nvidia is channelling Thunderbirds legend Parker for its latest system-on-chip for self-driving cars.
Two Parker processors are used in the PX 2 box we saw at the start of the year. This hardware adds a super-cruise-control to vehicles by hoovering up video feeds from onboard cameras and other sensor data, feeding it through an artificial intelligence model, and constantly making decisions on speed, lane positioning and so on.
This allows the car to drive itself, provided the model is trained appropriately for its surroundings. Today's deep-learning systems require a shedload of data to be able to spot patterns, recognize objects and comprehend situations from their surroundings. Producing a box like the PX 2 is only half or a third of the job. Giving it a well-trained model that understands construction works, signs, intersections and complex street junctions, not just highways, is crucial if you want truly autonomous vehicles.
We went into detail about the Pascal architecture here. Now let's look at the Tegra system-on-chip codenamed Parker, which shares the same name as International Rescue's loyal chauffeur and butler.
The 16nm FinFET SoC has 256 Pascal CUDA GPU cores and six 64-bit ARMv8-compatible general purpose cores: two of Nvidia's homegrown Denver 2 cores and four stock Cortex-A57 cores. All six talk to each other coherently with a 2MB L2 cache for the Denver cores and a 2MB L2 cache for the A57s. The chip is fabricated by TSMC, and can perform 1.5TFLOPS on 16-bit floating-point values, according to Nvidia.
It also includes cryptography engines, a 60FPS 4K video decoder and encoder, audio output, a 2D graphics renderer, 128-bit 50GB/s low-power DDR4 interfaces with ECC, and an image processor. You can basically hook it up to 12 road-watching cameras that are spread around the vehicle. There are also interfaces for flash memory card storage, SATA, QSPI and the standard CAN bus. The two CAN interfaces conform to ISO 11898-1.
As we'll see later, there is a heavy focus on virtualization: Parker uses ARM's hardware virtualization to put the various bits of software controlling the car into secure sandboxes – in theory.
There's also a safety management engine, which is a fancy watchdog. It's a separate dual processor that runs in lockstep to detect internal hardware errors. It runs a realtime operating system and monitors the onboard computer for faults, reporting them as they happen and running recovery code where possible. It picks up on warnings from the error-correcting RAM, and blacklists unreliable areas of DRAM. On-die memories also have ECC and parity protection.
We're told Parker is ISO 26262 compliant....MUCH MORE
